mipsel-unknown-linux-musl

Arch mips
Family linux
OS linux

CFGs:

  • debug_assertions
  • panic="unwind"
  • target_abi=""
  • target_arch="mips"
  • target_endian="little"
  • target_env="musl"
  • target_family="unix"
  • target_feature="llvm14-builtins-abi"
  • target_has_atomic="16"
  • target_has_atomic="32"
  • target_has_atomic="8"
  • target_has_atomic="ptr"
  • target_has_atomic_equal_alignment="16"
  • target_has_atomic_equal_alignment="32"
  • target_has_atomic_equal_alignment="8"
  • target_has_atomic_equal_alignment="ptr"
  • target_has_atomic_load_store="16"
  • target_has_atomic_load_store="32"
  • target_has_atomic_load_store="8"
  • target_has_atomic_load_store="ptr"
  • target_os="linux"
  • target_pointer_width="32"
  • target_thread_local
  • target_vendor="unknown"
  • unix

CPUs

Feature Name Feature Explanation LLVM
fp64 Support 64-bit FP registers. ⛔️
msa Mips MSA ASE. ⛔️
virt Mips Virtualization ASE. ⛔️
crt-static Enables C Run-time Libraries to be statically linked. ⛔️
abs2008 Disable IEEE 754-2008 abs.fmt mode. ✅
cnmips Octeon cnMIPS Support. ✅
cnmipsp Octeon+ cnMIPS Support. ✅
crc Mips R6 CRC ASE. ✅
dsp Mips DSP ASE. ✅
dspr2 Mips DSP-R2 ASE. ✅
dspr3 Mips DSP-R3 ASE. ✅
eva Mips EVA ASE. ✅
fpxx Support for FPXX. ✅
ginv Mips Global Invalidate ASE. ✅
gp64 General Purpose Registers are 64-bit wide. ✅
long-calls Disable use of the jal instruction. ✅
micromips microMips mode. ✅
mips1 Mips I ISA Support [highly experimental]. ✅
mips16 Mips16 mode. ✅
mips2 Mips II ISA Support [highly experimental]. ✅
mips3 MIPS III ISA Support [highly experimental]. ✅
mips32 Mips32 ISA Support. ✅
mips32r2 Mips32r2 ISA Support. ✅
mips32r3 Mips32r3 ISA Support. ✅
mips32r5 Mips32r5 ISA Support. ✅
mips32r6 Mips32r6 ISA Support [experimental]. ✅
mips3_32 Subset of MIPS-III that is also in MIPS32 [highly experimental]. ✅
mips3_32r2 Subset of MIPS-III that is also in MIPS32r2 [highly experimental]. ✅
mips3d Mips 3D ASE. ✅
mips4 MIPS IV ISA Support. ✅
mips4_32 Subset of MIPS-IV that is also in MIPS32 [highly experimental]. ✅
mips4_32r2 Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]. ✅
mips5 MIPS V ISA Support [highly experimental]. ✅
mips5_32r2 Subset of MIPS-V that is also in MIPS32r2 [highly experimental]. ✅
mips64 Mips64 ISA Support. ✅
mips64r2 Mips64r2 ISA Support. ✅
mips64r3 Mips64r3 ISA Support. ✅
mips64r5 Mips64r5 ISA Support. ✅
mips64r6 Mips64r6 ISA Support [experimental]. ✅
mt Mips MT ASE. ✅
nan2008 IEEE 754-2008 NaN encoding. ✅
noabicalls Disable SVR4-style position-independent code. ✅
nomadd4 Disable 4-operand madd.fmt and related instructions. ✅
nooddspreg Disable odd numbered single-precision registers. ✅
p5600 The P5600 Processor. ✅
ptr64 Pointers are 64-bit wide. ✅
single-float Only supports single precision float. ✅
soft-float Does not support floating point instructions. ✅
sym32 Symbols are 32 bit on Mips64. ✅
use-indirect-jump-hazard Use indirect jump guards to prevent certain speculation based attacks. ✅
use-tcc-in-div Force the assembler to use trapping. ✅
vfpu Enable vector FPU instructions. ✅
xgot Assume 32-bit GOT. ✅